Detectable Perturbations : A Paradigm for Technology - Speci c Multi - Fault Test

{ This paper introduces the concept of detectable perturbations as a method to generate tests that can then cover any technology-speciic faults such as multiple bridging , open and stuck-at faults. Rather than devising a cus-tomized test pattern generation system for each class of technology-speciic faults, we implemented a generic system to generate tests for single and multiple perturbations. We demonstrate the versatility of this approach by generating tests for a set of large benchmark circuits that have been mapped into single-and multi-output modules. These tests cover single stuck-at, multi-output bridging, stuck-at, as well as any mutation faults in the functionality of the technology-mapped cells. Experimental results provide useful insights about the quality of single stuck-at test patterns versus coverages for the additional classes of faults. I. INTRODUCTION Increasing number of technology mappers can now make use of FPGA or standard cell libraries where combina-tional cells have more than one output. Combining func-tionality of several single-output modules into a single cell typically reduces both the area occupied by active devices as well as the area taken by the interconnect between the cells. The presence of multi-output cells raises new questions about fault modeling and testing: how eeective is the traditional single stuck-at fault test when considering that module outputs may be pairwise bridging, stuck-at some constant values, may be interchanged, or are simply performing some other function not originally intended. Familiar examples of functional mutations on wires are related to manufacturing defects such as AND/OR bridging faults or pairwise stuck-at faults. Manufacturing defects may subtly change behavior of complex logical nodes in ways not detectable by single stuck-at fault tests. Alternatively , such nodes can also be incorrectly assigned functions during the speciication phase { for example instead of OR one may well specify XOR and escape detection. In this paper, we address the problem of testing for multi-faults by considering the problem of detecting functional mutations on wires as well as on logic nodes. The space of mutation faults, even without considering mutations of logic nodes, grows exponentially with the numbervided the XACT toolset to generate new technology-mapped benchmark netlists. of wires. Just for a pair wires, we can consider 255 cases of distinct 2-input 2-output functional mutations. Single , pairwise stuck-at and bridging faults are only special cases of such mutations. Rather than devising specialized algorithms to detect each speciic mutation of interest, we introduce a generic concept …